Our offer · ? 10 days annual leave fnew employees · ? Business trip accommodation in 4-5 stars hotel high business trip allowance · ? Overtime payment according to Chinese law · ? 12% household fund rate · ? 8 hours per day 5 working days per week · ? Further training possibilities within the group of companies in Austria ·Corporate events · ? Willingness to overpay depending on specific work experience qualifications Your tasks · ? Design detail engineering of automation machinery · ? Preparation of detail assembly drawings · ? Preparation of corresponding bills of materials · ? Accompanying support fassembly start-up work · ? Preparation of cycle time analyses fthe program sequence · ? Preparation of equipment lists fselecting the hardware · ? Complete the other tasks assigned by superi· ? Project responsibilities · ? Project Concept preparation, ? Project planning · ? Coordination of interfaces
Your profile · ? Solid education (BachelMaster) in the field of mechanical engineering · ? Good commof English is required · ? Readiness to travel within China · ? Sound experience in the field of project management · ? Interest on complex technical commercial tasks · ? Service-oriented attitude excellent customer handling · ? Ability to communicate to work in a team · ? Ability to assert yourself to make decisions · ? Readiness to take on responsibility
更新于 2026-03-01
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Job Description
Work with Front-End design team physical design team fsuper large-scale SoC chip physical implementation from RTL to GDS. Focus on physical design of deep sub-micron ultra large chip including block chip level synthesis, floorplan, place route, timing closure, physical verification, EM/IR signoff checks etc. The individual is expected to be an expert in multiple aspects in PD areas provide technically leadership to the engineering team.
Job Requirement
1. Hands on experience in super large-scale SoC chip physical design, especially experience in 7nm FinFet technology high-speed design implementation.
2. Solid knowledge rich experience on synthesis, floorplan, place, CTS routing, static timing analysis, EM/IR-drop physical verification.
3. Project experience on hierarchical flow such as top-level partition, timing budgeting, pin assignment Power Network Planning etc
4. Expertise with Synopsys/Cadence/MentEDA tools
5. Familiar with Unix/Linux environment good at scripts
6. A high-level of self-motivation a proactive approach to solving problems.
7. Good communication skills, strong interpersonal skills the flexibility
8. Dedicated, hardworking, good team player
更新于 2025-12-26
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